▸Overview
SymForge converts a list of pins into a ready-to-use schematic symbol library for four major ECAD ecosystems — OrCAD Capture, Cadence Concept HDL (Allegro Design Entry HDL), KiCad, and Altium Designer. The workflow takes about a minute for a typical part.
What it does
- Reads pin data from Excel, CSV, TSV, or pasted text
- Auto-groups pins by function (clocks, data, power, GPIO, NC) and assigns sensible sides
- Renders a live Cadence-style preview so you can verify before exporting
- Handles multi-section / split parts — one part with multiple symbol slots
- Generates native library files for all four target ECADs in one click
What it does NOT do
- PCB footprint creation — schematic symbols only
- Auto-routing pin placement perfectly for every conceivable part; always review the preview
- Bypass tool-specific quirks: OrCAD
.OLB and Altium .SchLib are binary proprietary formats, so SymForge emits an API script that builds them natively inside the host tool. KiCad .kicad_sym is open text, so it's direct.
The fastest way to learn: click Load Sample on the input panel. It loads a realistic 47-pin 3-section eMMC part so every step has data to play with.
1Load Pin Data
Provide your pin list via any of three methods. SymForge auto-detects the structure and normalizes everything into a single internal pin table.
A · FILE UPLOAD
Drag & drop an .xlsx, .xls, .csv, .tsv, or .txt onto the dropzone — or click to browse. Multi-sheet Excel: SymForge picks the first sheet with pin-like data.
B · PASTE
Click Paste Pins to open the paste modal. Three sub-modes:
· Spatial — column-based layout (mirrors datasheet pinout table)
· Structured — header row + data rows
· Flat list — one pin per line
C · SAMPLE
Click Load Sample to populate a realistic 47-pin 3-section eMMC part. Use this to explore the tool, then re-load your own data.
Expected columns
SymForge looks for these fields (case-insensitive, flexible names):
- Pin Number / Pad — required (e.g.
M3, 14, A12)
- Pin Name / Signal — required (e.g.
CLK, VCC, DAT[0])
- Type — optional. One of
INPUT, OUTPUT, BIDIR, ANALOG, POWER. If absent, SymForge infers from name (e.g. VCC→POWER, CLK→INPUT).
- Side — optional.
Left, Right, Top, Bottom. If absent, auto-assigned by category.
- Section — optional. Group label (e.g.
1, 2, A) for split parts.
Don't have a template? Click Download Template to grab a pre-formatted .xlsx with examples and the recommended column layout. Fill it in, drop it back.
2Set Symbol Metadata
These fields flow into the generated library files as part properties — manufacturer info for BOMs, footprint links for the PCB editor, reference designator for placement.
Required fields
- Symbol Name — the part's name in your library (e.g.
FEMC064GBE). Becomes the Value / LibReference / cell name across the four formats.
- Library Filename — what the output library will be called (e.g.
memory_lib → produces memory_lib.olb, memory_lib.kicad_sym, etc.).
Recommended fields
- Reference Designator — e.g.
U?, R?, D?. Used as the default refdes when placed in a schematic.
- PCB Footprint — e.g.
BGA153. Becomes the footprint property/implementation in the schematic library, linking to your PCB editor's footprint library.
- Manufacturer P/N and Internal Part Number — for BOM management.
- Description — one-line summary (e.g. "eMMC 5.1, 64GB, BGA-153"). Shows in BOMs and part-search dialogs.
Optional fields
- JEDEC Type — used only by Concept HDL's
part.ptf (Part Table). Leave blank if unsure; it'll appear as -.
Symbol Name tip: avoid spaces and special characters. Hyphens and underscores are safe everywhere. Forward slashes break Concept HDL paths.
3Review the Preview
The center panel shows a live SVG render of the symbol. This is your only chance to catch ordering, side-assignment, and grouping issues before exporting.
What to check
- Pin sides — power on the correct side? Inputs on the left? Adjust input data if needed.
- Grouping gaps — SymForge inserts a small gap between pin functional groups. If your groups look wrong, check the
Type column.
- Pin numbers — verify package pin numbers (e.g.
M3) match your part's footprint.
- Pin name overflow — long names (e.g.
SPI_MOSI_DAT_CLK) will render but may overlap the body. Shorten or split if necessary.
Controls
- Zoom in / out — buttons in the preview header. Mouse wheel also works.
- Section selector — appears only when the part has 2+ sections. Switch views to inspect each split slot independently.
- Pin Count badge — top-right shows total pins and current section.
Color key:
· ▣ INPUT
▣ OUTPUT
▣ BIDIR
▣ ANALOG
▣ POWER
4Choose Your Export Format
The export panel groups outputs into four ECAD families plus a single mega-bundle. Pick what your downstream design tool consumes.
Quick decision table
| You use… | Click… | What you get |
| Not sure / multiple teams |
▣ EXPORT ALL FORMATS |
One ZIP with sub-folders for all four ECADs + unified README |
| OrCAD Capture |
① FULL OLB BUNDLE |
Tcl script + CSV + JSON + SVG. Tcl runs inside Capture to build the .OLB natively. |
| Allegro DE-HDL |
② FULL CONCEPT HDL PROJECT |
Complete cell folder (chips/, entity/, sym_N/, metadata/, part_table/) — drop into your library dir. |
| KiCad |
③ .kicad_sym |
Direct native symbol library. Just download this single file. |
| Altium Designer |
④ FULL ALTIUM BUNDLE |
DelphiScript that builds the .SchLib inside Altium + Symbol Wizard CSV fallback. |
Why some formats need a script
OrCAD .OLB and Altium .SchLib are proprietary binary OLE compound files. Generating them byte-perfectly from a browser would require reverse-engineering each version's internal streams — fragile and unreliable.
Instead, SymForge emits a script using each tool's official scripting API (Tcl/Tk for OrCAD, DelphiScript for Altium). When you run that script inside the host tool, the tool itself produces the binary library — which means it's guaranteed correct and version-compatible.
KiCad's .kicad_sym is an open S-expression text format, so SymForge writes it directly — no script step.
Working with a mixed-tool team? Use the EXPORT ALL FORMATS mega-bundle. The README at the root has a pin-type-mapping table showing how each pin maps across all four ECADs.
5Import Into Your ECAD
Once you've downloaded the bundle, here's the import flow for each target tool. Each ZIP also contains a README.txt with these same instructions plus tool-specific notes.
OrCAD Capture · .OLB
- Unzip the OLB bundle.
- Open OrCAD Capture (or Allegro Design Entry CIS).
- Menu: Tools → Tcl/Tk Utilities → Run Tcl/Tk Script
- Browse to
build_olb.tcl and run. Capture writes <libname>.olb in the same folder.
- Add the new
.OLB to your project via Project Manager → Library → Add File.
Capture 23.1+ alternative: capture -tcl build_olb.tcl from a command line.
Cadence Concept HDL
- Unzip. The
concept_hdl/<symbolname>/ folder is the cell itself.
- Copy that folder into your library directory, e.g.
C:\SPB_Data\Lib_work\worklib\<symbolname>\.
- Open Allegro Design Entry HDL Project Manager — the cell appears under your library node.
- Verify: Package Pin tab populates from
chips/chips.prt; symbol view(s) render from sym_N/symbol.css; Part Table loads from part_table/part.ptf.
No genview step required. Concept HDL renders symbol.css directly.
KiCad 6 / 7 / 8
- Save the
.kicad_sym into your project (or global library) folder.
- KiCad: Preferences → Manage Symbol Libraries → +.
- Nickname: pick anything. Library Path: point to the file. Plugin: KiCad.
- Open the Symbol Editor — the part is under your chosen nickname.
KiCad 5 users: use the included .lib + .dcm pair instead.
Altium Designer
- In Altium: File → New → Library → Schematic Library. You now have an empty
Schlib1.SchLib.
- DXP → Scripting System → Run Script… (or File → Run Script…).
- Browse to
build_schlib.pas, expand it, select procedure CreateSymForgePart, click Run.
- The component appears in the SchLib panel. File → Save As → name it.
No-scripting alternative: Tools → Symbol Wizard → paste from altium_pins.csv (single-section parts only).
▸Tips & FAQ
How are pin types auto-detected?
When the input has no Type column, SymForge infers from the pin name: anything matching VCC*, VDD*, VSS*, GND*, VBAT*, etc. → POWER. Common clock and reset patterns → INPUT. Output patterns (*_OUT, DS, etc.) → OUTPUT. Bus pins (DAT*, SDA, CMD) → BIDIR. Anything starting with NC, RFU, or DNU → INPUT with a no-connect marker.
How do split / multi-section parts work?
Add a Section column to your input. Pins with section 1 become slot 1, section 2 become slot 2, and so on. In ECAD output:
- OrCAD — one part per section, named
PARTNAME-1, PARTNAME-2, etc.
- Concept HDL — one
sym_N/ folder per section, all linked in revision.dat
- KiCad — one symbol with
unit_count = N
- Altium — one component with
PartCount = N and per-section OwnerPartId
Will the Altium DelphiScript work on my Altium version?
The script uses the standard ISch_Lib API available in Altium Designer 6 through current versions. The script declares all Vars at the top of the procedure for compatibility with older DelphiScript interpreters that don't support inline declarations.
Why does my KiCad POWER pin show as power_in?
SymForge defaults POWER → power_in in KiCad output. That's correct for an IC consuming power (most chips). If your part is a power source (LDO output, voltage reference, etc.), change to power_out manually in the KiCad Symbol Editor after import.
The preview looks crowded — can I make pins fit better?
SymForge auto-sizes the symbol body based on pin counts on each side. If you want a different aspect ratio, redistribute pins across more sides in your input (move some left-side pins to top/bottom). The renderer respects whatever side assignment you provide.
Can I re-import a generated CSV later?
Yes. Every bundle includes a pins.csv at the top level. Drop it back onto the dropzone to restore the part for editing.
Where does the data go? Privacy?
Nowhere. SymForge is a single static HTML file with no server backend. All processing happens locally in your browser. You can save the page offline and use it air-gapped.
Found a bug or have a feature request? Visit ecadbridge.com or file an issue. SymForge improves based on what real engineers actually need.